Yusuke Inoue, Takatsugu Ono, Koji Inoue, “Real-time Frame-Rate Control for Energy-Efficient On-Line Object Tracking,” IEICE VLSI Design and CAD Algorithms , 2018. (to appear)
Omar M. Saad, Koji Inoue, Ahmed Shalaby, "Automatic Arrival Time Detection for Earthquakes Based on Stacked Denoising Autoencoder," IEEE Geoscience and Remote Sensing Letters, 2018. (to appear)
Tohru Ishihara, Akihiko Shinya, Koji Inoue, Kengo Nozaki, and Masaya Notomi, “An Integrated Nanophotonic Parallel Adder,” ACM Journal on Emerging Technologies in Computing Systems (JETC), Volume 14, Issue 2, Article No. 26, pp.26:1-26:20, Jul. 2018.
Satoshi Kawakami, Takatsugu Ono, Toshiyuki Ohtsuka, Koji Inoue, "Parallel Precomputation with Input Value Prediction for Model Predictive Control Systems,” IEICE Transactions on Information and Systems, 2018. (to appear)
Koki Ishida, Masamitsu Tanaka, Takatsugu Ono, Koji Inoue, "Towards Ultra High-Speed Cryogenic Single-Flux-Quantum Computing,” IEICE Transactions on Electronics, Vol.E101-C, No.5,pp.359-369, May. 2018. (invited paper)
Teruo Tanimoto, Takatsugu Ono, Koji Inoue, "Dependence Graph Model for Accurate Critical PathAnalysis on Out-of-Order Processors," Journal of Information Processing, Vol.25, pp.983-992, Dec. 2017.
Teruo Tanimoto, Takatsugu Ono, Koji Inoue, Hiroshi Sasaki, "Enhanced Dependence Graph Model for Critical Path Analysis on Modern Out-of-Order Processors,” IEEE Computer Architecture Letters, Vol. PP, No 99, pp.1-1, Mar. 2017.
Takayoshi Ishimoto, Yuichi Inadomi, Hiroaki Honda, Michihisa Koyama, "Parallel Performance Analysis for Electronic Structure Calculation of Metal Nanoparticles," Journal of Computer Chemistry, Japan, vol. 14, no. 3, pp.52-53, 2015.
Omar M. Saad, K. Inoue, Ahmed Shalaby, Lotf Samy, and Mohammed S. Sayed, "Autoencoder based Features Extraction for Automatic Classiﬁcation of Earthquakes and Explosions,” In Proc. of the 17th IEEE/ACIS International Conference on Computer and Information Science, pp.445-450, June 2018.
Ryuichi Sakamoto, Tapasya Patki, Thang Cao, Masaaki Kondo, Koji Inoue, Masatsugu Ueda, Daniel Ellsworth, Barry Rountree, Martin Schulz, "Analyzing Resource Trade-offs in Hardware-overprovisioned Supercomputers," In Proc. of the 32nd International Parallel and Distributed Processing, May 2018.
Teruo Tanimoto, Takatsugu Ono, Koji Inoue, "CPCI Stack: Metric for Accurate Bottleneck Analysis on OoO Microprocessors,” In Proc. of the International Symposium on Computing and Networking, pp.166-172, Nov. 2017.
Mihiro Sonoyama, Takatsugu Ono, Osamu Muta, Haruichi Kanaya, Koji Inoue, "Wireless Spoofing-Attack PreventionUsing Radio-Propagation Characteristics," In Proc. of the 15th IEEE International Conference on Dependable, Autonomic and Secure Computing, pp.502-510, Nov. 2017.
Hiroshi Sasaki, Fang-Hsiang Su, Teruo Tanimoto, Simha Sethumadhavan, "Why Do Programs Have Heavy Tails?," In Proc. of the IEEE International Symposium on Workload Characterization, pp.135-145, Oct. 2017.
Masamitsu Tanaka, Ryo Sato, Yuki Hatanaka, Yuichi Matsui, Hiroyuki Akaike, Akira Fujimaki, Koki Ishida, Takatsugu Ono, Koji Inoue, “High-Throughput Bit-Parallel Arithmetic Logic Unit Using Rapid Single-Flux-Quantum Logic,” In Proc. of the International Superconductive Electronics Conference, Jun. 2017.
Ryuichi Sakamoto, Thang Cao, Masaaki Kondo, Koji Inoue, Masatsugu Ueda, Tapasya Patki, Daniel Ellsworth, Barry Rountree, and Martin Schulz, "Production Hardware Overprovisioning: Real-world Performance Optimization using an Extensible Power-aware Resource Management Framework", 31st IEEE International Parallel & Distributed Processing Symposium (IPDPS 2017). May 2017.
Satoshi Imamura, Keitaro Oka, Yuichiro Yasui, Yuichi Inadomi, Katsuki Fujisawa, Toshio Endo, Koji Ueno, Keiichiro Fukazawa, Nozomi Hata, Yuta Kakibuka, Koji Inoue, Takatsugu Ono, “Evaluating the Impacts of Code-Level Performance Tunings on Power Efficiency,” In Proc. of the IEEE International Conference on Big Data (IEEE BigData '16), pp.362-369, Dec. 2016.
Satoshi Imamura, Yuichiro Yasui, Koji Inoue, Takatsugu Ono, Hiroshi Sasaki, Katsuki Fujisawa, "Power-Efficient Breadth-First Search with DRAM Row Buffer Locality-Aware Address Mapping,” In Proc. of the 1st High Performance Graph Data Management and Processing workshop (HPGDMP '16), pp.17-24, Nov. 2016.
Koki Ishida, Masamitsu Tanaka, Takatsugu Ono, Koji Inoue, "Single-Flux-Quantum Cache Memory Architecture,” In Proc. of the 13th International SoC Design Conference (ISOCC '16), pp.106-107, Oct. 2016.
Yoshihiro Tanaka, Keitaro Oka, Takatsugu Ono, Koji Inoue, “Accuracy Analysis of Machine Learning-Based Performance Modeling for Microprocessors,” In Proc. of the 2016 Fourth International Japan-Egypt Conference on Electronics, Communications and Computers (JEC-ECC '16), pp.87-90, May 2016.
Koji Inoue, Yuichi Inadomi, and Takatsugu Ono, "Challenges in Power Constrained High Performance Computing," Organized Session for Green HPC, Annual Meeting on Advanced Computing System and Infrastructure, Jan. 2016.
Yuichi Inadomi, Tapasya Patki, Koji Inoue, Mutsumi Aoyagi, Barry Rountree, Martin Schulz, David Lowenthal, Yasutaka Wada, Keiichiro Fukazawa, Masatsugu Ueda, Masaaki Kondo, Ikuo Miyoshi, "Analyzing and Mitigating the Impact of Manufacturing Variability in Power-Constrained Supercomputing," In Proceedings of the International Conference for High Performance Computing, Networking, Storage and Analysis (SC '15), No.78, pp.78:1-78:12, Nov. 2015.
Takeshi Soga, Hiroshi Sasaki, Tomoya Hirao, Masaaki Kondo, and Koji Inoue, "A flexible hardware barrier mechanism for many-core processors," In Proceedings of the 2015 Asia and South Pacific Design Automation Conference (ASP-DAC '15), pp.61-68, Jan. 2015.
Ghadeer Almusaddar, Takatsugu Ono, Smruti Sarangi, Koji Inoue, “Whitelisting Approach Using Hardware Performance Counters in IoT Microprocessors,” IEICE Tech. Rep., Vol. 118, No. 3, HWS2018-6, pp. 29-34, Apr. 2018.
Takatsugu Ono, "Secure Computing Platform for IoT Devices," The 6th International Cybersecurity Workshop, Jan. 2018.
Takatsugu Ono, "Protecting an IoT Device from Malware - A Processor Architecture Perspective,” Workshop on Architectural Implications of Security in IoT Processors, Nov. 2017.
Yuta Kakibuka, Yuichiro Yasui, Takatsugu Ono, Katsuki Fujisawa, Koji Inoue, “Performance evaluation of Graph500 considering CPU-DRAMpower shifting,” Poster session The International Conference for High Performance Computing, Networking, Storage, and Analysis, Nov. 2017.
Takatsugu Ono, "Developing an Interconnection Network Simulator for Energy Efficient Large Scale Networks,” Workshop on Recent Topics in High Performance Computing, Sep. 2017.
Yusuke Inoue, Takatsugu Ono, Koji Inoue, “Adaptive Frame-Rate Optimization for Low Energy Object Tracking,” Work-in-Progress session at the 2016 Design Automation Conference (DAC '16), June 2016.
Keitaro Oka, Wenhao Jia, Margaret Martonosi, and Koji Inoue, "Characterization and Cross-Platform Analysis of High-Throughput Accelerators," In Proceedings of the 2015 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS '15) as a poster abstract, Mar. 2015.
Takatsugu Ono, Yuta Kakibuka, Nikhil Jain, Abhinav Bhatele, Shinobu Miwa, Koji Inoue, "Extending A Network Simulator for Power/Performance Prediction of Large Scale Interconnection Networks,” "Modeling and Simulation of HPC Architectures and Applications held in conjunction with SIAM Conference on Parallel Processing for Scientific Computing, Mar. 2018. (to appear)
Koki Ishida, Masamitsu Tanaka, Takatsugu Ono, Koji Inoue, “Logic Design of a Single-Flux-Quantum Gate-Level-Pipelined Microprocessor,” Superconducting SFQ VLSI Workshop, Invited talk, pp.6-12, Feb. 2017.
Masamitsu Tanaka, Ryo Sato, Yuki Hatanaka, Yuki Ando, Takahiro Kawaguchi, Koki Ishida, Akira Fujimaki, Kazuyoshi Takagi, Naofumi Takagi, Takatsugu Ono, Koji Inoue, “Energy-Efficient, High-Performance Microprocessors Based on Single-Flux-Quantum Logic,” 29th International Symposium on Superconductivity, Invited talk, Dec. 2016.
Koji Inoue, "Manycore Execution of Model Predictive Control," The Fifth International Conference on Continuous Optimization, Invited talk, Aug. 2016.
Koji Inoue, "Impact of Manufacturing Variability in Power Constrained Supercomputing," International Forum on MPSoC for Software-defined Hardware, Invited talk, Jul. 2016.
Koji Inoue, "NsimPower: Interconnect Simulator for Power and Performance Prediction,” International Forum on MPSoC for Software-defined Hardware, Invited talk, Jul. 2015.
Mihiro Sonoyama, "2017 Excellent Student Award of The IEEE Fukuoka Section" (2018)
Masamitsu Tanaka, Ryo Sato, Yuki Hatanaka, Yuichi Matsui, Hiroyuki Akaike, Akira Fujimaki, Koki Ishida, Takatsugu Ono, Koji Inoue, "Design Contest Award Honorable Mention, The 23rd International Symposium on Low Power Electronics and Design (ISLPED)" 2017.